(1) Field of the Invention
This invention relates to the problem of error voltage in a metal oxide semiconductor field effect transistor, or MOSFET, analog switch in a sample and hold circuit for an analog to digital converter caused by the turn off charge in the MOSFET analog switch. This invention provides a compensating circuit which reduces the error voltage to zero or nearly zero.
(2) Description of Related Art
Increasing demands on the quality of signal processing have made requirements for high speed, high precision analog to digital converter circuits more stringent. The MOSFET analog switch in a sample and hold circuit is a key part of analog to digital converters but the turn off charge in the MOSFET analog switch has a detrimental effect on precision. The turn off charge is the charge that flows from the MOSFET analog switch to the holding capacitor of the equivalent after the MOSFET analog switch has been turned off.
A number of articles deal with the problem of this turn off charge error including the following: "Switch-Induced Error Voltage on a Switched Capacitor," by Sheu and Hu, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. SC-19, No. 4, August 1984, pages 519-525; "Measurement and Modeling of Charge Feedthrough in n-Channel MOS Analog Switches," by Wilson et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. SC-20, No. 6, December 1985, pages 1206-1213; "Measurement and Analysis of Charge Injection in MOS Analog Switches," by Shieh et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. SC-22, No. 2, April 1987, pages 277-281; "Charge Injection in Analog MOS Switches," by Wegmann et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. SC-22, No. 6, December 1987, pages 1091-1097; "New Observation of Charge Injection in MOS Analogue Switches," by Chen et al, ELECTRONICS LETTERS, Vol. 30, No. 3, Feb. 3, 1994, pages 213-214; " All-MOS Charge Redistribution Analog-to-Digital Conversion Techniques-Part I," by McCreary and Gray, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. SC-10, No. 6, December 1975, pages 371-379; and "An 8-bit 50-MHz CMOS Subranging A/D Converter with Pipelined Wide-Band S/H," by Ishikawa and Tsukahara, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 24, No. 6, December 1989, pages 1485-1491. The problem of turn off charge in a MOSFET analog switch and a feedback circuit to reduce the error are discussed in "A High-Speed Sample-and-Hold Technique Using a Miller Hold Capacitance," by Lim and Wooley, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 26, No. 4, April 1991, pages 643-651. Turn off charge in a MOSFET analog switch and the use of a dummy transistor to reduce the error are discussed in "Dummy Transistor Compensation of Analog MOS Switches," by Eichenberger and Guggenbuhl, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 24, No. 4, August 1989, pages 1143-1145 and "On Charge Injection in Analog MOS Switches and Dummy Switch Compensation Techniques," by Eichenberger and Guggenbuhl, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, Vol. 37, No. 2, February 1990, pages 256-264.
The use of a feedback circuit to control the error voltage due to the turn off charge in the MOSFET analog switch can reduce the error voltage but does not reduce the error voltage to zero. The use of the dummy transistor uses both a clock signal and an inverted clock signal and suffers from the variation in delay between the clock signal and the inverted clock signal. This invention uses only the clock signal and can reduce the error voltage to zero or nearly zero.